An Open Standard Software Library for High-Performance Parallel Signal Processing: the Parallel VSIPL++ Library

James Lebak, MIT Lincoln Laboratory, Lexington, MA, Jeremy Kepner, MIT Lincoln Laboratory, Lexington, MA, Henry Hoffmann, MIT Lincoln Laboratory, Lexington, MA, and Edward Rutledge, MIT Lincoln Laboratory, Lexington, MA

5/09/2008
(Original Publish Date: 4/15/2004)

Real-time signal processing consumes the majority of the world’s computing power. Increasingly, programmable parallel processors are used to address a wide variety of signal processing applications (e.g. scientific, video, wireless, medical, communication, encoding, radar, sonar and imaging). In programmable systems the major challenge is no longer hardware but software. Specifically, the key technical hurdle lies in allowing the user to write programs at high level, while still achieving performance and preserving the portability of the code across parallel computing hardware platforms. The Parallel Vector, Signal, and Image Processing Library (Parallel VSIPL++) addresses this hurdle by providing high level C++ array constructs, a simple mechanism for mapping data and functions onto parallel hardware, and a community-defined portable interface. This paper presents an overview of the Parallel VSIPL++ standard as well as a deeper description of the technical foundations and expected performance of the library. Parallel VSIPL++ supports adaptive optimization at many levels. The C++ arrays are designed to support automatic hardware specialization by the compiler. The computation objects (e.g. Fast Fourier Transforms) are built with explicit setup and run stages to allow for run-time optimization. Parallel arrays and functions in VSIPL++ support these same features, which are used to accelerate communication operations. The parallel mapping mechanism provides an external interface that allows optimal mappings to be generated off-line and read into the system at run-time. Finally, the standard has been developed in collaboration with high performance embedded computing vendors and is compatible with their proprietary approaches to achieving performance.